Implemented an assembler for converting ARM RISC-V assembly command types into machinery bit codes
Created register files, immediate generators, multiplexers, and ALUs and combined into digital systems logic
Programmed hazard detection and forwarding units for developing a pipelined processor with pipeline registers, drastically increasing efficiency
Integrated the assembler, digital systems logic, and control units along with a custom RISC-V instruction using Verilog, increasing efficiency by extra 50%
